The 'callback arrives 3-6 ms late' model that invalidated render-ahead in earlier sessions was a mislabeled STG field: the Choreographer callback actually fires at edge+0.5 ms (measured from the VSYNC ftn/mon pair). With the wake ON the edge, the held frame presented at render START lands at edge+~1.5 ms (constant phase, 4 ms of deadline margin), and render spikes (5-10 ms, the measured cause of the residual 1% drops + 1.5 ms phase spread) only stretch the PREPARE phase of the frame held for the NEXT slot — spikes stop delaying visible frames. - lib.rs: RENDER_AHEAD_ACTIVE = locked again (was false) - lib.rs/stg.rs: IT lines gain rcpu (CPU us inside do_render) — spike classifier: rcpu≈render ⇒ Skia/driver CPU work; rcpu≪render ⇒ blocked on GPU/driver - hypotheses-120hz.md: model correction + sltest baseline + results Emulator behavior verified: scroll, settle (transition flush), mid-drag pause/resume (no black window), no AlreadyAcquired panics, held-frame presents at 0.6-2.1 ms. Phone cadence measurement pending (phone out for user use ~2h).
93 lines
5.3 KiB
Markdown
93 lines
5.3 KiB
Markdown
# 120 Hz zero-jank campaign — hypothesis log
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Target: sltest (minimal 100-row grid, no textures) on the phone's Mali G715.
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Definition of ZERO JANK (measured from PRES mon= + VSYNC ftn= lines):
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1. no display-slot skip: for consecutive presents, slot_index(n+1) == slot_index(n)+1 (100%)
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2. no same-slot double: two presents never land in the same display slot
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3. phase stable: present phase within its slot varies < 0.5 ms
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Test: 2x `input swipe 640 1900 640 900 4000` (slow drags) + fling, ~10 s.
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A "burst" = consecutive presents with gaps < 20 ms; evaluate inside bursts only.
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## Hypotheses (order = priority)
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- H6 [sltest confound]: sltest FileLogger is blocking (flush per line) on the
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render path (PRES/STG/IT at ~240 lines/s).
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FIX: non-blocking drain-thread logger. TEST: rebuild, re-measure baseline.
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- H1: early waker misses edges (thread descheduled / nanosleep jitter) →
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render starts late (edge+5 late wake wins) → present phase bimodal.
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TEST: render-start phase histogram vs edges; early-wake hit rate.
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- H2: Skia render core variance → present phase jitter.
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TEST: VK SKD distribution in sltest (trivial scene, expect <1.5 ms).
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- H3: wgpu/Mali submit+present latency variance (CLR/SKF/ORD/PRE).
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TEST: VK PRE / CLR / SKF distributions in sltest.
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- H4: event-loop overhead (timers, change tracker, spin iterations) eats the
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slot budget.
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TEST: IT poll/timers/ev/fe distributions; iters/s during scroll.
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- H5: CPU scheduling of the UI thread (deschedule mid-slot, core migration,
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frequency).
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TEST: wall vs CPU split for the render window (vkprobe thread_cpu_ns).
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- H7 [method confound]: adb `input swipe` motion is bursty (~20-60 Hz) →
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grid movement itself is non-uniform regardless of render cadence.
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TEST: pointer-location overlay + user finger, later.
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## Rules
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- One hypothesis per build; keep the change minimal; measure before/after
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with the identical test; record numbers here.
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- A hypothesis is RULED OUT only when the measurement it predicts is absent
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(not "the fix didn't help").
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- Phone hygiene before each run: clean task (sz=1), ResumedActivity,
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dismiss 16KB dialog (sltest is debuggable), record log byte offsets.
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## Results
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### 2026-07-09 — sltest baseline + model correction (builds slt1-slt3)
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- **H6 RULED OUT / FIXED**: sltest's blocking FileLogger replaced with a
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non-blocking drain-thread logger. No crash, no behavior change beyond
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log I/O coming off the render path.
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- **MODEL CORRECTION (major)**: the "Choreographer callback arrives 2.5-6 ms
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after the edge" belief from earlier sessions was WRONG — it came from the
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STG `wake=` field, which actually measures the poll's block time (first
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event), not callback latency. Measured from the VSYNC line itself
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(ftn = vsync edge, mon = callback ran): **callback delivery = edge+0.52 ms
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median, p90 0.65, max 1.8 ms** (sltest, phone). The callback fires ON the
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edge.
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- **H5 RULED OUT for the poll phase**: `pcpu` (CPU time inside
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poll_events) = 2% of wall — the UI thread sleeps in epoll normally; it is
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not spinning or descheduled while waiting. The wake→poll path is healthy:
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poll start ≈ edge−2.3, byte at edge+0.5, return at edge+0.5, render 2.3-4.3
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ms, present ≈ edge+3-4 ms — INSIDE the 5.5 ms deadline at the median.
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(The early-waker's edge−0.8 wake is redundant with the on-edge
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Choreographer wake — both are fine; the waker stays as fallback.)
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- **Baseline zero-jank metrics (sltest, phone, 991 transitions)**:
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DROPPED 0.71%, WASTED 0.91%, phase p10-p90 = 2.64-4.13 ms (1.5 ms
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spread), 12.5% consecutive phase jumps >1 ms. Median behavior is correct;
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the visible judder is the variance.
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- **H2/H3 CONFIRMED (residual cause)**: per-frame render = 3.5 ms median
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but spikes to 10.7 ms. Stage breakdown (sltest, phone): SKD (Skia draw)
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1.07 ms median / 5.2 max; CLR (wgpu clear submit) 0.8 / 3.2; PRE 1.0 / 2.5;
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SKF 0.3; ORD 0.35. Spikes push presents past the deadline (the drops) and
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shake the phase (the judder). GPU submit overhead (2.45 ms median) exceeds
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the actual scene draw (1.07 ms) — four wgpu submits per frame.
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- **Next (implemented, phone-measurement pending)**: RENDER-AHEAD
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re-enabled under the corrected model. With the wake on the edge, the held
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frame is presented at the START of the render (edge+~1.5 ms, constant
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phase, 4 ms margin) and a spike only stretches the PREPARE phase of the
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frame held for the next slot — spikes stop delaying visible frames.
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Behavior verified on the emulator (scroll, settle, mid-drag pause/resume,
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no AlreadyAcquired, no black window). The phone is the only remaining
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test: expect drops → ~0 and phase spread → <0.5 ms IF spikes were the
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cause; `rcpu` (CPU time inside do_render) classifies any residual spikes
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(CPU work vs GPU/driver block).
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- **Emulator caveat**: the emulated Choreographer fires 9-10 ms late and the
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SF pipeline is slow — the emulator cannot reproduce or validate 120 Hz
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cadence; it is for behavior verification only. Phone remains the test
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target.
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### Pending when the phone is back
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1. Install slt3+ (render-ahead + rcpu), clean task, 2×4 s drags.
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2. Run sltslot.py: target DROPPED=0, WASTED=0, phase spread <0.5 ms.
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3. If residual: classify spikes via rcpu (≈render ⇒ CPU/Skia; ≪render ⇒
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GPU/driver block), then attack the top stage (CLR submit back-pressure vs
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SKD Skia stalls vs PRE present cost).
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